pcc/ internals/ pass2

Instructions are generated from NODE trees by matching operations in an instruction description table. Each instruction table entry consists of the information needed to be able to emit an instruction with correct parameters.

The instruction table

A typical table entry looks like this:

                NAREG|NASL, RESC1,
                "       addl3 AL,AR,A1\n", },

This entry matches a 3-parameter add instruction that adds integers and return the value in a third register.

The first entry in the table is the node type to match. Besides node types it can also be OPSIMP, OPLTYPE and a few others to get the entry to match multiple operations.

This field is used to match which result is wanted from the instruction. INTAREG means result in temporary register, FOREFF means for side effects only. This field will most likely disappear in the future.

The second/third row is to tell which shape/type the left/right leg must be in. There are a few pre-defined shapes, and more shapes can be added for a specific architecture.

This is the needs that the instruction may have to be able to be used. NAREG means that one AREG must be allocated, NASL means that the register may be shared with the left node register.

The result from the operation will end up somewhere (unless it is a FOREFF node), and the reclaim field tells where to look for the result. RESC1 means the first allocated register (in needs), RLEFT would have meant that the left leg contained the result.

The instruction string printed have a special macro system. Capital letters are macros that calls for support routines; for example 'A' calls adrput() and the second letter tells which leg the argument is. '1' means the allocated register.

Prolog/Epilog issues

In the Interpass prolog/epilog structs the field ip_lblnum contains the lowest/highest local label used in pass1 for this function. This is for the convenience of the optimizer in pass2 when building static tables.

The field ip_lbl in the "prolog struct" is the label number where the function starts after the prologue but before the move of function arguments to temporaries. Note that push/pop of callee-saved register variables takes place in the prologue/epilogue.

In the "epilog struct" ip_lbl is a label written out after the last instruction in the function but before any "struct return" code generated and the epilogue code is written out. After this label the data flow will fall through to the epilogue. If ip_lbl is set to 0 then no epilogue code will be generated; the function do not return.